Standard

JEDEC JESD8-9B

Publisert
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Omfang

This standard defines the input, output specifications and ac test conditions for devices that are designed to operate in the SSTL_2 logic switching range, nominally 0 V to 2.5 V. The standard may be applied to ICs operating with separate VDD and VDDQ supply voltages. This standard has been developed particularly with the objective of providing a relatively simple upgrade path from MOS push-pull interface designs. The standard is particularly intended to improve operation in situations where busses must be isolated from relatively large stubs.

Dokumentinformasjon

  • Standard fra JEDEC_AC
  • Publisert:
  • Versjon: 0
  • Varetype: IS
  • Tilleggsinformasjon
    • ERRATA: October 18, 2002