Standard

JEDEC JESD8-9B

Published

Singles purchase not accessible

This standard can not be purchased as a single sales.

Abstract

This standard defines the input, output specifications and ac test conditions for devices that are designed to operate in the SSTL_2 logic switching range, nominally 0 V to 2.5 V. The standard may be applied to ICs operating with separate VDD and VDDQ supply voltages. This standard has been developed particularly with the objective of providing a relatively simple upgrade path from MOS push-pull interface designs. The standard is particularly intended to improve operation in situations where busses must be isolated from relatively large stubs.

Document information

  • Standard from JEDEC_AC
  • Published:
  • Version: 0
  • Document type: IS
  • Additional information
    • ERRATA: October 18, 2002