Standard

JEDEC JESD82-552

Published

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Abstract

This standard defines standard specifications for features and functionality, DC and AC interface parameters and test loading for definition of the DDR5MDB02 data buffer for driving DQ and DQS nets on DDR5 MRDIMM applications.  The purpose is to provide a standard for the DDR5MDB02 logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.  NOTE: The designation DDR5MDB02 refers to the part designation of a series of commercial logic parts common in the industry. This designation is normally preceded by a series of manufacturer specific characters to make up a complete part designation.  This document uses DDR5MDB02, DDR5MDB, Data Buffer, MDB, or Buffer interchangeably throughout for the DDR5MDB02 device naming.

Document information

  • Standard from JEDEC_AC
  • Published:
  • Version: 0
  • Document type: IS