Standard

JEDEC JESD73-3

Published

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Abstract

This standard provides a set of uniform data sheet parameters for the description of a single 10-bit, 2.5 V FET transmission-gate bus switch device for DDR memory module and motherboard applications. This bus switch device has a low ON resistance allowing inputs to be connected directly to outputs, with near zero propagation delay.

Document information

  • Standard from JEDEC_AC
  • Published:
  • Version: 0
  • Document type: IS